The present invention relates to a method of assembling microelectronic elements with other microelectronic elements, and to forming microelectronic packages.
Certain microelectronic elements comprise contacts exposed on a surface of the microelectronic element, such as a semiconductor chip with contacts. The contacts are used to electrically interconnect the chip with external circuits. Typically, certain microelectronic elements such as semiconductor chips are assembled into microelectronic packages. Certain methods of forming microelectronic packages involve electrically interconnecting a first microelectronic element with a component or other element and connecting contacts on the microelectronic element to conductive features on the component or other element.
Certain methods of forming microelectronic packages comprise assembling a wafer incorporating a plurality of semiconductor chips with a component having conductive features. It is known to form gold studs on conductive pads on the wafer and to apply a solder material to the studs by plating the solder material onto the studs. Plating typically requires forming a mask so that the solder is applied to the ends of the studs while other surfaces are projected. The wafer is subjected to the plating process and is typically protected by the mask during plating.
After applying solder material, the conductive features on the component and the studs on the wafer are joined by heating the solder material to the reflow temperature of the solder and allowing the solder to cool. In the alternative, the conductive features may be joined to the studs using methods such as thermosonic and thermocompression bonding, which do not require a distinct bonding material. These methods require equipment designed for thermosonic or thermocompression bonding.
Methods for electrically connecting contacts of a first microelectronic element to the conductive features of a second microelectronic element are disclosed in certain embodiments of U.S. Pat. No. 5,518,964, the disclosure of which is hereby incorporated by reference herein. In certain embodiments of U.S. Pat. No. 5,518,964, a wafer, incorporating a number of semiconductor chips, is assembled with a component having individual chip regions. Contacts of the chips are bonded to leads of the component so that each chip is connected to a chip region of the component. In certain embodiments, a resist layer is applied to the leads and photolithographically patterned to form openings in the resist layer at the desired locations for spots of bonding material. The electrically conductive bonding material is electroplated onto the leads in each opening in the resist layer. The leads are bonded to the contacts of the semiconductor chips using the spots of bonding material.
It is also known to stencil solder material onto the studs. The stencil has a first surface, a second surface and apertures. The first surface is juxtaposed with the first face of the microelectronic element. The stencil must be positioned so that the apertures are aligned with the studs on the microelectronic element. The solder material is deposited on the second surface of the stencil and drawn across the second surface, typically using a squeegee, so that solder enters the apertures and contacts the studs. Proper alignment of the stencil apertures with the studs is required so that solder material is deposited on the studs with at least some accuracy.
Despite the availability of techniques for assembling microelectronic packages, further improvements are desired.
In one aspect of the present invention, a method of electrically interconnecting microelectronic elements comprises providing a first microelectronic element having a first surface and contacts exposed at the first surface. The contacts include protrusions extending away from the first surface. The method includes providing a substantially uniform layer of bonding material on a support, dipping the protrusions of the contacts into the substantially uniform layer of bonding material so as to transfer the bonding material onto the contacts, and bonding the contacts to conductive features of a second microelectronic element. Preferably, the protrusions are dipped so that a substantially uniform amount of bonding material is transferred onto the contacts. The step of dipping does not require the precise alignment required for stenciling. Plating is not required to deposit bonding material onto the contacts.
The first microelectronic element and the second microelectronic element may be juxtaposed with one another so that the bonding material is contiguous with the contacts and conductive features. The bonding material may be heated before the step of juxtaposing the first and second microelectronic elements. The bonding material may also be heated while the first and second microelectronic elements are juxtaposed with one another.
In certain embodiments, the step of bonding includes applying heat to the bonding material. However, the bonding material may be heated either before or during the step of bonding the contacts to the conductive features of the second microelectronic element. In a preferred embodiment, the bonding material comprises solder paste and the step of heating comprises heating the solder paste to reflow the solder paste. The step of heating may comprise heating the contacts of the first microelectronic element before the step of dipping so that the solder paste transferred to the contacts is heated. In certain embodiments, the protrusions are heated to reflow the solder paste while the protrusions and conductive features are contiguous with the solder paste. In certain preferred embodiments, the contacts are heated before or after the step of dipping. The contacts may comprise pads exposed at the first surface of the first microelectronic element. The protrusions of the contacts may comprise studs attached to the pads. The studs may comprise gold studs, or protrusions of any other material or shape.
The studs may have a first end connected to the pads and a second end facing away from the pads for receiving the bonding material. The bonding material is preferably applied to the second end of the studs by dipping the second end of the studs in the bonding material. The method may include forming the studs utilizing wire bonding.
In certain preferred embodiments, the first microelectronic element comprises a semiconductor wafer having a plurality of semiconductor chips, each semiconductor chip having contacts to be bonded to conductive elements of the second microelectronic element.
The wafer may include a plurality of elongated leads extending along the first surface. Each lead is connected to a contact. The leads may have a first end connected to a contact and a second end carrying a protrusion.
In certain preferred embodiments, the leads are deformed after the step of bonding. The second ends are displaced relative to the first ends of the leads so as to bend the second ends away from the first surface. The assembly may be encapsulated by injecting a curable flowable dielectric material around the leads and curing the dielectric material. In certain preferred embodiments, the dielectric layer comprises a flexible dielectric layer. The step of displacing the second ends of the leads may comprise moving the wafer and flexible dielectric layer with respect to one another. The wafer and the dielectric layer may be severed so as to form a plurality of units.
In certain embodiments, the conductive features comprise elongated leads extending along a first face of the second semiconductor element. At least some of the leads are bonded to a contact during the bonding step. The leads may have first ends and second ends and the second ends may be displaced with respect to the first ends so as to bend the second ends away from the first face. A flowable dielectric material may be injected around the leads to form a dielectric support layer around the leads.
The first and second microelectronic element may comprise any microelectronic element, including semiconductor chips, wafers, support layers, and other microelectronic elements. The contacts and protrusions may be provided on the first microelectronic element, the second microelectronic element, or both. In certain embodiments, the dielectric layer has leads that are attached to contacts on the dielectric layer at the first ends and that carry protrusions at the second ends. The wafer may have contacts with protrusions and the dielectric layer may have leads that are bonded to the protrusions on the wafer.